The present invention relates generally to the field of processors, and more particularly to the independent mapping of threads over parallel slices in a processor core.
Register files are a means of memory storage within a central processing unit of a computing device and may be used for storing architectural state information, among other information and data. The architectural state information may include instructions, operands, and addresses. Each register file may store the architectural state and future state information for one or more threads, or sequence of programmed instructions.
In some processors, the register file is a centralized component of the execution units, and is able to supply all of the register file data to its connected execution units in both single thread (ST) and simultaneous multi-threading (SMT) modes. In these processors, if the register file gets too large, a second level of storage may often be added.